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IP Cores, Inc.
Short Desc. :
FFT1024 – 1024 POINT FFT IP CORE
The FFT1024 core implements 1024 or 512 point FFT in hardware. It can be dynamically configured to process one 1024 or two simultaneous 512 point FFT/IFFT operation.
- Supports 512 and 1024-point FFT and IFFT and can switch dynamically
- Can process up-to two 512 FFT simultaneously (well suited for MIMO application)
- Built-in bit reversal. Outputs in Natural order
- Supports reading output data in any order (read address)
- Low Latency. Can be customized to improve latency vs. gate count
- Throughput of 1 sample per clock (0.75 samples per clock for FFT1024-4
- Parameterized bit widths and fixed-point option.
- Test bench with fixed-point Matlab model
- Available in ASIC and FPGA technologies
- Minimal gate count implementation
- Supports flushing and re-starting the FFT instantly
- Configurable bit width based on SQNR requirement for random inputs or for a specific stimuli pattern.
- Customization for OFDM applications
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