Think Silicon Ltd 
Short Desc. : Floating Poing Adder / Subtractor
Overview :
The Think-Silicon Floating Point AddSub is a web configurable generator for standard IEEE 754 single
precision floating point Adder/Subtractor. The generated modules support Denormalised numbers and perform
rounding to nearest.
Features : - IEEE-754 Single Precision (32bits)
- Supports Round-to-nearest
- Supports Denormals
- pure Verilog rtl
- Synthesizable
Categories :
Portability :
Type : Soft
S2C: FPGA Base prototyping- Download white paper

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