VeriSilicon Holdings Co., Ltd. 
Short Desc. : UMC18_PRG_07B---UMC 0.18um 5v-3.3v Power Regulator
Overview :
Based on UMC 0.18um 3.3v/1.8v Logic Process, current design of Power Regulator is to provide the 3.3v voltage output regulated from a 5v input supply. Moreover, the design is resilient against any reliability issue. The maximum output current is 250mA. This IP also supports bypass mode when AVDD and AVDD5 are 3.3v input. It can be forced by setting BYPASS=AVDD or can be detected automatically by internal sensor (When BYPASS=0). The internal voltage detector can check the V33 output. When V33 rises to trigger point, FLGH and FLGL will output high.
Features : - Process: UMC 0.18um 3.3v/1.8v 1P6M Logic Process
- Input voltage: 3.3v~5.5v
- Output voltage: 3.3v%+/-5%
- Maximum output current: IV33max =250mA
- Standby current: Iq=60uA
- Operating temperature: -40c~+25c~+125c
Categories :
Portability :
Type : Hard
S2C: FPGA Base prototyping- Download white paper

Internet Business Systems © 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy