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 Xilinx 
Short Desc. : Complex Multiplier
Overview :
The Complex Multiplier core multiplies two complex numbers, with all operands and the results represented in signed two's complement format. The operand widths are parameterizable, ranging from 4 to 35 bits, and the resulting product width supports up to 64 bits.When the product width is defined to be less than the full width of the product, the core supports both rounding and truncation of the result. Optimization for speed or resource utilization is available through implementation using the 3-multiplier or the 4-multiplier solutions.
Features : - Optimized use of the XtremeDSP slice (DSP48) in Virtex-4 and Embedded Multiplier in other families
- Parameterizable precision of up to 63-bit for the input and 127-bit for the output
- Optional unbiased rounding
- Implementation trade off for speed versus resource utilization with the use of 3 or 4 multipliers
Categories :
Portability :
Type : Soft
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