Embedded, IP & SoC News
Submit New Event
What Would Joe Do?
Submit New Tutorial
Submit New Video
Submit New YouTube Video
Submit New Download
EDA Media Kit
Banner Ad Specifications
eMail Blast Specifications
Short Desc. :
PLB ATMC (DO-DI-ATM)
The PLB_ATMC IP, includes an asynchronous transfer mode controller with a UTOPIA Level 2 or UTOPIA Level 3 interface and is designed to incorporate the features defined in UTOPIA Level 2, Version 1.0, af-phy-0039.000, written by the ATM Forum Technical Committee, June, 1995 or in UTOPIA Level 3 Physical Layer Interface, af-phy-0136.000, written by the ATM Forum Technical Committee, November, 1999.
- UTOPIA Level 2 or UTOPIA Level 3
- UTOPIA master or slave interface for either level
- UTOPIA interface data path of 8 or 16 bits for level 2; and 8, 16 or 32 bits for level 3
- Interface throughput up to 622 Mbps (OC12) for 16 bit UTOPIA Level 2; and up to 2.4 Gbps (OC48) for 32 bit UTOPIA Level 3
- To allow the user to obtain an PLB_ATMC that is uniquely tailored for their system, certain features are parameterizable in the PLB_ATMC design.
© 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 —
, or visit our other sites: