Short Desc. : OPB Interrupt Controller
Overview :
The OPB Interrupt Controller provides a bus-centric wrapper that contains the IntC core that attaches to the On-Chip Peripheral Bus (OPB). The IntC core is a simple, parameterized interrupt controller that is used to design embedded systems using PowerPC™ in Virtex-II Pro™ or MicroBlaze™ based applications. There are currently two versions of the Simple Interrupt Controller: OPB IntC (OPB interface) and DCR IntC (DCR interface). IntC and DCR IntC are interchangeable referring to functionality or interface signals common to all variations of the DCR interrupt controller. This IP core is one of more than 20 IP cores that are part of the Embedded Development Kit.
Features : - Provides more interrupt options to the processor core
- Parameterizable core that can be modified to suit customer specific applications
- Used to designing embedded systems in Xilinx FPGAs
Categories :
Portability :
Type : Soft
S2C: FPGA Base prototyping- Download white paper

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