Embedded, IP & SoC News
Submit New Event
What Would Joe Do?
Submit New Tutorial
Submit New Video
Submit New YouTube Video
Submit New Download
EDA Media Kit
Banner Ad Specifications
eMail Blast Specifications
Short Desc. :
DS3/E3 Deframer Core
The Aliathon DS3/E3 Deframer core provides a flexible, resource-efficient, programmable-logic based solution for level 3 PDH interfacing. It caters for both clear-channel payloads, such as PLCP/ATM over DS3, and channelised applications, such as multiple E2s over E3.
- Accepts multiple input streams, making it ideal for interfacing to SONET/SDH demappers or multichannel LIUs. The input streams may dynamically range between 1 and 8 bits wide, allowing seamless interfacing to SONET/SDH VC3 mappings
- Performs frame synchronisation for the following level 3 PDH signals
- o DS3 (m23 and cbit)
- o E3 with positive justification (g.751)
- o E3 clear-channel (g.832)
- Reports LOS, AIS and LOF.
- Calculates and reports parity errors for DS3.
- Extracts all frame overhead.
- Processes both channelised and clear-channel payloads. For clear-channel applications the core provides a byte-aligned data output. For channelised applications the core can extract
- o 7 tributaries (6.312kbps over DS3)
- o 4 tributaries (8.448kbps over E3)
- Accepts configuration on a per-channel basis, allowing mixes of protocols and payloads to be concurrently processed. Configuration may also be dynamically modified.
© 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 —
, or visit our other sites: