Faraday Technology Corp. 
Overview :
This library is tailored for UMC’s 0.18μm 1.8V/3.3V Low Leakage Logic Process.
Multi-voltage I/O buffer is designed to operate under 1.8V, 2.5V and 3.3V supply
voltages All I/Os are equipped with a rich selection of programmable features capable
of adapting to a wide variety of application environments. Two layout structures, both
optimized for pad limited and core limited designs, are available to support each
programmable feature or function.
Features : - UMC’s 0.18μm 1.8V/3.3V Low Leakage Logic Process
- 3.3V/2.5V/1.8V input, 3.3V/2.5V/1.8V output drive
- Output buffer with programmable drive strength from 2mA to 16mA with 2mA
- step at 3.3V operation
- Input buffer with programmable pull up resistance, pull down resistance, keeper, and Schmitt trigger
- Built-in Antenna diodes for all pins
- ESD Robustness and Latch-up immunity proven by Silicon
Categories :
Portability :
Type : Hard
S2C: FPGA Base prototyping- Download white paper

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