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 Aurora VLSI Inc 
Short Desc. : AU-FB8081: IEEE 1394b + OHCI AMBA Subsystem Core
Overview :
The AU-FB8081 IEEE 1394b + OHCI AMBA Subsystem provides an IEEE 1394b peripheral
subsystem for AMBA based SOCs. It contains an IEEE 1394b Link Layer Controller that connects seamlessly to the AMBA AHB Bus. The Open Host Controller Interface (OHCI) is included to provide DMA packet data transfers, interrupts, and other OHCI compatible features. The figure below shows IEEE 1394b + OHCI Subsystem usage within an SOC. The IEEE 1394b + OHCI AMBA Subsystem Core is available as a synthesizable Verilog model from Aurora VLSI, Inc.
Features : - IEEE 1394b Link Layer Controller
- Compliant with IEEE 1394b
- IEEE 1394b link layer functionality
- IEEE 1394b-2002 parallel PHY interface
- Supports 100, 200, 400, 800, and 1600 mbits/s
- Cycle master capability
- Generates CRC for transmit and checks CRC for receive packets
- Asynchronous and isochronous transfers are supported
- Packet status captured
- PHY status and cycle sync status
Categories :
Portability :
Type : Soft
Deliverables : - RTL Verilog source code model of the core, Verilog testbench and test cases, Synthesis scripts examples, Complete detailed documentation and training class notes
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