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 Aurora VLSI Inc 
Short Desc. : AU-F8080: IEEE 1394b Link Layer Controller Core
Overview :
The AU-F8080 is the Link Layer Controller for IEEE 1394b. It is a fully synthesizable core, which can be integrated seamlessly with any application. The AU-F8080 interfaces to the PHY Chip using the IEEE 1394b-2002 parallel PHY standard. On the application side, a simple interface provides direct access to receive and transmit FIFOs. The AU-F8080 supports 100, 200, 400, 800, and 1600 Mbits/s transfers. The 1394b LLC Core is available as a synthesizable
Verilog model from Aurora VLSI, Inc.
Features : - Compliant with IEEE 1394b
- AU-F8080 has link layer functionality
- Uses IEEE 1394b-2002 parallel PHY standard to interface to the PHY chip
- Asynchronous and isochronous transfers are supported
- Supports 100, 200, 400, 800, and 1600 mbits/s
- Simple application interface
- Direct FIFO access for both asynchronous and isochronous interface
- Cycle master capability
- Generates CRC for transmit and checks CRC for receive packets
- Separate FIFOs for transmitting asynchronous and isochronous packets
Categories :
Portability :
Type : Soft
Deliverables : - RTL Verilog source code model of the core, Verilog testbench and test cases, Synthesis scripts examples, Complete detailed documentation and training class notes
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