austriamicrosystems AG 
Short Desc. : BIST for single port RAM in 0.35µm CMOS (C35/S35)
Overview :
BIST structure generation is an additional service to the generation of RAM instances. Data is provided on a placement of a purchase order
Features : - Bist Implementation for RAM instances derived from single port RAM compiler (C35/S35)
- Unidirectional / bidirectional RAMs supported
- Bist available for all sizes of RAM compiler
- Different testalgorithms available
- Is operating on same edge / opposite edge of RAM clock
- "Debuggable" in simulation
Categories :
Portability :
Type : Soft
Deliverables : - RAM size configuration, unidirectional / bidirectional, BIST operating on same/opposite system clock edge, test algorithm
TrueCircuits: UltraPLL

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