Embedded, IP & SoC News
Submit New Event
What Would Joe Do?
Submit New Tutorial
Submit New Video
Submit New YouTube Video
Submit New Download
EDA Media Kit
Banner Ad Specifications
eMail Blast Specifications
Part Number :
The CWda16 IP core is a configurable stereo audio interface component designed to input a serial digital audio stream. The CWda16 supports the well known I2S interface format originally developed by Philips and also the Left-Justified or Right-Justified serial audio formats. The CWda16 can be configured at runtime to support two(16, 20, 24 or 32 bit) audio channels read from two different addresses in an interleaved manner, or two 16-bit audio channels read in parallel from the same register.
- Configurable input format: I2S, Left Justified or Right justified (chosen at runtime)
- Configurable sample FIFO depth (at pre-synthesis time).
- Supports user configurable sample width (at runtime).
- Reports number of samples in FIFO.
- Reports FIFO empty, full, almost empty and almost full condition.
- Runtime Configurable Upper-FIFO-Limit; a request is activated when this limit is exceeded.
- Supports up to 32 bits per sample.
- Supports all commonly used sample rates including 32, 44.1, 48, 96, 192 and 384 kHz.
- Runtime Configurable read method. Serial sample read (Left and then Right), or parallel sample read (Left and Right).
- Flexible CW-Link interface, which permits bridging to standard interfaces (I2S, IBM CoreConnectTM, AMBATM AHB, etc).
© 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 —
, or visit our other sites: