|The PLL031HA0A, a 0.18μm Phase-Locked Loop (PLL) cell, provides a clock multiplier and / or clock de-skew circuit that can generate a stable, high-speed clock from a slower external clock signal. This cell is a generic PLL that integrates a Voltage-Controlled Oscillator (VCO), a Phase-Frequency Detector (PFD), a Low Pass Filter (LPF), two 6-bit programmable dividers and all other associated support circuitries. This IP facilitates clock multiplications from a stable crystal oscillator source. It also facilitates clock de-skews for another clock. It supports operating voltage range of 1.62V ~ 1.98V with operating junction temperature in the range of -40 ℃~ 125℃.