Faraday Technology Corp. 
Part Number : FXPLL110HC0H_APGD
Overview :
The FXPLL110HC0H_APGD is a 0.13 μm Phase-Locked Loop (PLL) IP that multiplies slower input signal and/or de-skew clock. It can generate wide range clock signals from 62.5 MHz to 1 GHz, and the output is a stable, low-jitter signal. This IP can be used in consumer electric products or in CPUs.
Features : - UMC 0.13 μm logic EHS (FSG) process
- Operating voltage range: 1.08 V ~ 1.32 V
- Minimum metal requirement: 4 metal layers
- The power/ground I/O cells are included.
- Low jitter output
- Power-down mode
- No external component required
Categories :
Portability :
Type : Hard
S2C: FPGA Base prototyping- Download white paper

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