Faraday Technology Corp. 
Part Number : FXPLL050HA0A
Overview :
The FXPLL050HA0A is a 0.18 μm Phase-Locked Loop (PLL) IP with a clock multiplier and/or clock de-skew circuit capable of generating a stable, high-speed clock from an external slower clock’s signal. This cell is a generic PLL which integrates a voltage-controlled oscillator (VCO), a phase-frequency detector, a low pass filter, two 6-bit programmable dividers and all other associated support circuitries. In addition to facilitating clock multiplications from the stable crystal oscillator source, the cell also facilitates clock de-skews for another clock. This PLL supports operating voltages in the range of 1.62 ~ 1.98 V and operating junction temperatures in the range of -40 ~ 125 °C.
Features : - Operating voltage range: 1.62 ~ 1.98 V
- Operating junction temperature range: -40 ~ 125 °C
- IP’s minimum metal requirement: 3 metal layers
- Output frequency range: 60 ~ 200 MHz
- 6-bit programmable pre-divider
- 6-bit programmable loop divider
- Power-down mode
- Built-in loop filter
Categories :
Portability :
Type : Hard
S2C: FPGA Base prototyping- Download white paper

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