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Short Desc. : M1284H-A1 IEEE 1284 Host Parallel Port; 79 unidirectional I/O ports, 60.5% utilization of an A54SX16A FPGA, 333 S modules, 545 C modules, 57 MHz Post layout per
Overview :
M1284H-A1 IEEE 1284 Host Parallel Port; 79 unidirectional I/O ports, 60.5% utilization of an A54SX16A FPGA, 333 S modules, 545 C modules, 57 MHz Post layout performance
Categories :
Portability :
Type : Firm
Deliverables : - .edf netlists with and without I/O, .vhd netlist without I/O.sdf timing file, .adb Actel database, documentation
DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers
TrueCircuits: UltraPLL



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