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 Helion Technology Limited 
Part Number : Multi-mode
Overview :
This high performance core from Helion is intended exclusively for use in ASIC and implements both the
SHA-1 and SHA-256 secure hash algorithms to NIST FIPS Publication 180-2.
Both hash algorithms take as input a message of arbitrary length, process the message in 512-bit blocks,
and produce as output either a 160-bit (SHA-1) or 256-bit (SHA-256) message digest. They are intended
for digital signature applications, where a large file must be compressed in a secure manner before being
encrypted.
Applications include hardware implementations of the Internet standard HMAC (RFC 2104) used in the
IPsec and SSL protocols, and in digital signature applications where a hash function is used to generate
and verify signatures for data integrity and origin authentication .
Features : - Implements both SHA-1 and SHA-256 secure hash algorithms to NIST FIPS Publication 180-2
- Fast operation – each 512-bit block requires only 82 (SHA-1) or 66 (SHA-256) master clock cycles
- Performs automatic message length calculation and padding insertion
- Optional user initialisation of IVs for optimised HMAC support
- HMAC wrapper available to make implementations quick and easy
- Optional state unload/reload feature for handling fragmented messages
- Simple external interface
Categories :
Portability :
Type : Soft
CST Webinar Series
S2C: FPGA Base prototyping- Download white paper



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