HDL Design House 
Short Desc. : HIP 2500
Overview :
Solomon codes, a class of error correction codes, are block-oriented coding schemes used in communication systems for FEC (Forward Error Correction). Information coding prior to transmission is performed against limited transmit power/bandwidth. ReedSolomon decoding architectures contribute to systems that are sensitive to transmission errors, with no data acknowledge or data retransmit. They are well suited for correcting errors that occur in bursts. Combined with a Viterbi coding scheme, ReedSolomon codes can be used to create concatenated code with increased performance.
Features : - Provides automatic configuration for widely recognized and applied RS coding
- standards
- Allows symbol clock rate to be specified,defining a system/symbol clock rate ratio
- User-configurable block length value
- User-configurable transmitted information/check symbols
- User-configurable symbol width
- User-configurable GF primitive polynomial
- Supports core customization against application requirements using
- parameterized, flexible IP core implementation
- Single clock synchronous design
- Technology-independent HDL code
- Supports SoC integration
Categories :
Portability :
Type : Soft
S2C: FPGA Base prototyping- Download white paper

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