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Short Desc. : FIR Filter Generator
Overview :
A FIR filter performs a convolution of an input data sequence with the filter's impulse response (the discrete- time inverse Fourier transform of its desired frequency response), which is stored in memory.
Features : - Variable Number of Taps, up to 2048
- Input and Coefficients Widths of 2 to 36 Bits
- Selectable Rounding: Truncation, Round to Nearest, Convergent Rounding
- Optional Saturation Logic for Overflow Handling
- Full Precision Arithmetic
- Signed or Unsigned Data and Coefficients
- Configurable Parallelism from Full to Single Multiplier
- Multi-channel Support (up to 256 Channels)
- Decimation and Interpolation Ratios from 2 to 256
- Configurable Pipelining to Increase Performance
Categories :
Portability :
Type : Soft
CST Webinar Series
S2C: FPGA Base prototyping- Download white paper



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