Short Desc. : Block Convolutional Encoder
Overview :
Lattice's Block Convolutional Encoder IP core is a parameterizable core for convolutional encoding of a continuous or burst input data stream. The core allows different code rates, constraint lengths and supports puncturing. It can operate in continuous or block mode, whichever is required by the channel. Either tail-biting or zero-flushing convolutional codes can be generated when the core works in the block mode.
Features : - Compatible with the Following Standards: IEEE 802.16-2004, IEEE 802.11a, 3GPP, 3GPP2 and DVB-S
- Supports Both Continuous and Block Encoding
- Variable Constraint Length from 3 to 9
- Supports Both Zero Flushing and Tail Biting Termination Modes
- Supports Both Internal and External Zero Padding in Zero Flushing Mode
- Supports Both Internal and External Tail Adding in Tail Biting Mode
- Supports a Wide Range of Programmable Code Rates (input_rate/output_rate)
- User Defined Generator Polynomials
- Output Puncturing with Unrestricted, User Programmable Puncture Patterns
- Supports Dynamic Puncturing Mode, in Which Both the Code Rate and Puncture Patterns Can Be Varied through Ports
- Punctured Code Rate Can Be Programmed to k/n, Where k Can Be from 2 to 12 and n Can Be from k+1 to 2k-1; Additionally, Rate 1/2 is Supported in Dynamic Puncture Mode
Categories :
Portability :
Type : Soft
S2C: FPGA Base prototyping- Download white paper

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