Login

 Mentor Graphics 
Short Desc. : Inventra CON-DEC, Concatenated Decoder; ~5,700 gates documented (user parameterised design), size and max clock depends on technology and symbol rate and channe
Overview :
Inventra CON-DEC, Concatenated Decoder; ~5,700 gates documented (user parameterised design), size and max clock depends on technology and symbol rate and channel parameters.
Categories :
Portability :
Type : Soft
Deliverables : - C Model, VHDL & Verilog Synthesisable Source Code, VHDL & Verilog Testbench, Synthesis Script, Test Script
DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers
TrueCircuits: IoTPLL



Internet Business Systems © 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy