Chevin Technology Limited 
Part Number : CT 1025
Short Desc. : Ultra Low Latency 25Gbit/s Ethernet MAC
Overview :

The Chevin Technology 25GMAC IP core provides Ultra Low-Latency 25Gbit/s Ethernet connectivity in Xilinx Virtex® UltraScale™ FPGAs.

The 25GMAC can be integrated into customers’ products with an external or internal PCS, however we recommend using Chevin Technology’s 25GPCS for simplified integration and lowest possible latency.

Features : - Designed to IEEE 802.3 Specification
- Low Latency 20.5 ns
- Integrated FCS CRC32 check/generate
- Small Footprint, 2680 LUTs
- Flow Control option with Pause packets
- Programmable max frame length
- Reconciliation Layer -Local /Remote Faults
- Programmable Inter Frame Gap
- Deficit Idle Count for maximum throughput
- Cut-through mode for lowest latency
- Store-and-forward for minimum app load
- MAC address filtering options
- Detailed traffic analysis statistics collection
Categories :
Tags : low latency, FPGA, 25G, Ethernet, MAC, Xilinx,Virtex UltraScale
Portability :
 FPGA Technologis 
Xilinx :

Type : Soft
Deliverables : - Encrypted RTL/VHDL source code
- Encrypted compiled netlist
- Datasheet & User Guide to assist integration
- Reference Design on Alpha-Data ADM-PCIE-8V3 board
- Simulation Test bench
- Build scripts for Vivado
S2C: FPGA Base prototyping- Download white paper

Internet Business Systems © 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy