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 Synopsys 
Part Number : dwipk_ufshost_mphy_arc
Short Desc. : IP Prototyping Kit for DWC UFS 2.X host controller on HAPS-DX7, M-PHY card, AXI tunnel to ARC SDP
Overview :
The DesignWare ® UFS Host Controller IP is a standard based serial interface engine for implementing a JEDEC UFS interface in compliance with the JEDEC UFS Architecture Specification (UFS) and the JEDEC UFS Host Controller Specification (UFSHCI). The DesignWare MIPI® UFS Host Controller is a high-performance int erface that is primarily used in mobile devices where data is stored on non-volatile mass storage memory devices. The UFS Host Controller integrates the UFS host controller application layer with a pre-configured DesignWare MIPI UniPro protocol stack that is optimized for UFS host applications. When combined with the multi-gear DesignWare MIPI M-PHY IP, Synopsys provides a single vendor MIPI IP solution, enabling designers to easily integrate the UFS Host implementation in application processors with less risk, while speeding time-to-market.
Features : - UFS host solution compliant with JEDEC Universal Flash Storage (UFS) v2.0
- Compliant with JEDEC UFS host controller interface specification v2.0
- Delivered as UFS host application layer integrated with UniPro controller, compliant with MIPI Alliance UniPro specification version 1.60
- Manages UFS protocol between host and external UFS device
- Single traffic class
- Supports M-PHY v3.1 and access to M-PHY attributes
- Supports multiple lanes in HS-Gear3
- Low-power operation, small area, and low latency
- Enables power gating, use of UPF flow and auto hibernate feature for efficient power reduction
Categories :
Maturity : Available on request
Portability :
Type :
 Hard IP 
Nodes :
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Process :
all

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