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Part Number : CCSDS LDPC Encoder and Decoder
Short Desc. : CCSDS LDPC Decoder and Encoder IP Core, RTL for ASIC and FPGA (Xilinx, Altera).
Overview :

The CCSDS LDPC codec supports code rate 223/255 with coded block size of 8160 bits, which allows for a simple replacement of legacy Reed-Solomon decoders. It was designed particularly for near-earth space missions, but the excellent error correction performance makes it the ideal fit for additional high-throughput applications such as microwave or optical links.


Features : - Features

- Block size of 8160 bits
- Code rate 223/255 (7136/8160)
- Compliant with "TM Synchronization and Channel Coding, Recommended Standard, CCSDS 131.0-B-2, Blue Book"

- Your Benefits

- Low-power sowie low-complexity Design.
- Gains more than 2.5 dB compared to Reed-Solomon decoder.
- Low-power and low-complexity design.
- Layered LDPC decoder architecture, for faster convergence behavior.
- Block-to-block on-the-fly configuration.
- Early stopping criterion for iterative LDPC decoder, saving a considerable amount of energy.
- Configurable amount of LDPC decoding iterations for trading-off throughput and error correction performance.
- Collection of statistic information (number of iterations, decoding success).
- Available for ASIC and FPGAs (Xilinx, Altera).
Categories :
Tags : ldpc ccsds decoder encoder
Portability :
Type : Soft
Deliverables : - Deliverable includes VHDL source code or synthesized netlist, VHDL or SystemC testbench, and bit-accurate Matlab, C or C++ simulation model.
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