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 Algotronix Ltd. 
Part Number : AES-GCM-100G-OTN
Short Desc. : AES GCM 100G for OTN Core
Overview :

The Algotronix AES-GCM Core implements the Galois Counter Mode (GCM) of operation of the Advanced Encryption Standard (AES) algorithm. The AES-GCM mode of operation is published by National Institute of Standards and Technology as NIST Special Publication SP800-38D making it an officially endorsed mode of operation of the AES cipher. The AES-GCM-100G-OTN version of the product is optimised for applications, such as OTN, where all packets are relatively large, all the same size and keys change relatively infrequently. These characteristics allow an implementation with extreme levels of pipelining and parallelism.


Features : - Implementation of AES-GCM with 96 bit IV and 128 bit or 256 bit keys.
- Suitable for OTN and applications requiring AES-GCM with fixed packet sizes and relatively infrequent key changes
- Compatible with all modern Xilinx and Altera FPGA families
- Configurable number of compute units each containing fully pipelined AES implementation for performance between 20 and 400Gbit/sec
- Pass through functionality for packets not requiring encryption
- Comprehensive self-checking testbench
- Supplied as VHDL source code to allow security review
Categories :
Tags : OTN, AES 100G
Maturity : new
Portability :
 FPGA Technologis 
Altera :
Arria 10
ARRIA V GT
ARRIA V GX
ARRIA V GZ
ARRIA V ST
ARRIA V SX
Stratix IV
STRATIX IV E
STRATIX IV GT
STRATIX IV GX
Stratix V
STRATIX V E
STRATIX V GS
STRATIX V GT
STRATIX V GX
Xilinx :
Kintex-7
Virtex-6
Virtex-6 -1L
Virtex-6 CXT
Virtex-6 HXT
Virtex-6 LX
Virtex-6 LXT
Virtex-6 SXT
Virtex-7
Virtex-7 -2L
Virtex-7 XT
Virtex-7 XT
Virtex-7T

Type : Soft
Deliverables : - VHDL or Verilog Source code with Test Bench, Test Vectors
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