I.7 BCH/BCH FEC IP Cores
- Compliant with G.975.1 Annex 7
- 8.02dB net coding gain at 10-15 output BER
- 10G, 40G, and variable rates in between
- Generic CPU interface for control and monitoring
- corrected bits
- corrected ones
- corrected zeros
- corrected codes
- uncorrectable codes
- Enables replacement of I.7 ASSPs
- Support for ASIC and FPGA implementation
- Integrates seamlessly with other Altera IP cores
For additional information regarding Altera FPGA products and NTC OTN IP Products visit www.altera.com.
Want to Dig Deeper?
For more information about our I.7 BCH/BCH FEC IP Cores, please contact your Altera® sales representative or FAE, or visit www.altera.com.