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Short Desc. : 8B10B Encoder/Decoder
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Notice: The 8B10B Encoder/Decoder MegaCore® function in this compiler is under obsolescence. Please refer to the product discontinuance notice, PDN 1304.

General Description

Encoders and decoders are used for physical layer coding for Gigabit Ethernet, Fibre Channel, and other applications. The 8B/10B encoder takes byte inputs and generates a direct current (DC) balanced stream (equal number of 1s and 0s) with a maximum run length of 5. Some of the individual 10-bit codes have an equal number of 1s and 0s, while others have either four 1s and six 0s, or six 1s and four 0s. In the latter case, the disparity between 1s and 0s is used as an input to the next 10-bit code generation to reverse the disparity and maintain an overallbalanced stream. For this reason, some 8-bit inputs have two valid 10-bit codes, depending on the input disparity.

The Altera® 8B10B Encoder/Decoder MegaCore® function is a compact, high-performance intellectual property (IP) core capable of encoding and decoding in multi-gigabit applications.

Typical Application

The 8B10B Encoder/Decoder MegaCore function can be used within generic framing procedure (GFP) applications. Figure 1 shows an example.

Figure 1. 8B10B Encoder/Decoder GFP Typical Application

Figure 1. 8B10B Encoder/Decoder GFP Typical Application

OpenCore Plus Evaluation

Use the Altera OpenCore Plus evaluation flow to test drive this IP core.

Performance

Typical expected performance and utilization figures for this core are provided in the 8B10B Encoder/Decoder MegaCore Function User Guide (PDF).


Features :
  • 8B/10B encoding and decoding
  • Cascaded encoding and decoding
  • Industry compatible special character coding
  • Easy-to-use MegaWizard┬« interface
  • Intellectual property (IP) functional simulation models for use in Altera-supported VHDL and Verilog HDL simulators
  • Complies with all applicable standards, including:
    • Institute of Electrical and Electronics Engineers, IEEE 802.3z, Media Access Control (MAC) Parameters, Physical Layer, Repeater and Management Parameters for 1000 Mb/s Operation,1998, paragraphs 36.2.4.1 to 36.2.4.6
    • American National Standards Institute, ANSI X3.230, Fibre Channel Physical and Signaling Interface (FC-PH), 1994
    • International Telecommunication Union, ITU-T Recommendation G.7041, Generic Framing Procedure, October 2001

Categories :
Portability :
 FPGA Technologis 
Altera :
Arria GX
Arria II GX
Cyclone
Cyclone II
Cyclone III
CYCLONE III LS
CYCLONE IV GX
HardCopy II
HARDCOPY III
HARDCOPY IV E
HARDCOPY IV GX
Stratix
Stratix GX
Stratix II
Stratix II GX
STRATIX III E
STRATIX IV GT
STRATIX IV GX

Type : Hard
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