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SC1021-S is a wireless 802.11 MAC with both 802.11a and 802.11b PHY interfaces, flexible, full standard implementation. The Host/CPU, assisted by hardware has full control of the 802.11e/i MAC protocol. It has PCI Interface or Generic RISC interface with master DMA or slave capabilities. LLC or Layer Management will write data packets according with the standard MAC and management services in a consistent simple format
- Maximum theoretical throughput (IP frames/second). Maximum wireless medium utilization.
- AP or STA or HC or QSTA
- Standard DCF and PCF
- HC on HCCA. Coexisting with (DCF/PCF/EDCA), packet burst (CFB) and BACKReq, BACK. It has built in precision clock synchronization as specified by 802.11e. It has service interval requirements as specified in 802.11e. It has internal hardware Polling and b
- Full Direct Link support per packet commanded by the CPU.
- Enhanced security per 802.11i with WEP-40/TKIP/CCMP cipher suite implemented in hardware.
- Hardware implementation with an internal compact Multi Queue System will eliminate latency time encountered in the software implementation and improve the system performance, medium access, overall throughput in packets per seconds. It implements HC or QS
- Fragmentation/Defragmentation, packet/fragment duplication is implemented internally in hardware. It has no latency during fragmentation/retransmissions or WEP/WEP2/AES.
- 802.11a/b/g PHY access. Multiple concurrent PHYs.
- Power Save modes for STA in IBSS.
Analog & Mixed Signal
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