||- Fully Integrated 100 Mb/s Cat-5 UTP Ethernet PHY Cell
- Complete On Chip 100Base-Tx / Cat-5 Solution
- Complies with IEEE 802.3u 100Base-TX PHY specification.
- On chip advance DSP based adaptive equalizer
- Superior DSP based CLOCK RECOVERY architecture.
- SYMBOL MODE cypher scrambler and descrambler for the reduction of EMI (TP-PMD standard ) are integrated.
- Output spectrum and strict rise & fall time control through waveform synthesis and current source output driver greatly reduces radiated emissions and eliminates EMI problems.
- 4b/5b encoding / decoding performed on unscrambled data for TP-PMD compatibility
- Supports SMII, RMII and media independent interface standards for controller interface;