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The Western Design Center
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The W65C816S is a low power cost sensitive 16-bit microprocessor. The variable length instruction set and manually optimized core size makes the W65C816S an excellent choice for low power System-on-Chip (SoC) designs. The Verilog RTL model is available for ASIC design flows. WDC, a Fabless Semiconductor Company, provides packaged chips for evaluation or volume production.
- W65C816 Soft Core (RTL model)
- The W65C816 Soft Core is a RTL (Register Transfer Level) description in Verilog HDL (Hardware Description Language) and is a synthesizable model. This single clock logic architecture is technology independent. WDC's W65C816 Soft Core is designed to replace the industry standard W65C816 16-bit microprocessor and can be used as a drop-in replacement is ASIC's. It has been synthesized into the XC4085 FPGA technology from Xilinx. The behavioral model is equivalent to the original W65C816 hard core. The standard chip model includes the softcore and the buffer ring in RTL code. If a minimum amount of gates are needed, the hard core of the W65C816C should be used.
- The W65C816 Hard Core is a manually optimized full custom hard core that has been used in millions of applications. The W65C816 Hard Core has been manufactured in 3um, 2um, 1.5um, 1.2um, and 0.8um
- The Development System includes a W65C816DB Developer Board, an In-Circuit Emulator (ICE) and the W65cSDS Software Development System.
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