Login
 IP's Search 
 
 
PortabilityShow All
Only
Only
Only
Only
Only
Only
Only
Only
Only
Only
Only
 Search Result 
Displaying 1301-1400/3526

HDMI 2.0 TX PHY 6Gbps in TSMC 28nm HPM 1.8V, North/South Poly Orientation
dwc_hdmi20_tx_ns_6gbps_tsmc_28hpm18
Features
HDMI 2.0 TX PHY 6Gbps in TSMC 40nm LP 2.5V
dwc_hdmi20_tx_6gbps_tsmc_40lp25
Features
HDMI 2.0/MHL RX Combo 1P PHY 6Gbps in TSMC 28nm HPC 1.8V, North/South Poly Orientation
dwc_hdmi20_mhl_rx_ns_1p_6gbps_tsmc_28hpc18
Features
HDMI 2.0/MHL RX Combo 1P PHY 6Gbps in TSMC 28nm HPM 1.8V, North/South Poly Orientation
dwc_hdmi20_mhl_rx_ns_1p_6gbps_tsmc_28hpm18
Features
HDMI 2.0/MHL RX Combo 1P PHY 6Gbps in TSMC 40nm LP 2.5V
dwc_hdmi20_mhl_rx_1p_6gbps_tsmc_40lp25
Features
HDMI 2.0/MHL RX Combo 4P PHY 6Gbps in TSMC 28nm HPC 1.8V, North/South Poly Orientation
dwc_hdmi20_mhl_rx_ns_4p_6gbps_tsmc_28hpc18
Features
HDMI 2.0/MHL RX Combo 4P PHY 6Gbps in TSMC 28nm HPM 1.8V, North/South Poly Orientation
dwc_hdmi20_mhl_rx_ns_4p_6gbps_tsmc_28hpm18
Features
HDMI 2.0/MHL RX Combo 4P PHY 6Gbps in TSMC 40nm LP 2.5V
dwc_hdmi20_mhl_rx_4p_6gbps_tsmc_40lp25
Features
HDMI TX PHY 1.4 at 3.4Gbps in TSMC55LP
dwc_hdmi14_tx_phy_340gbps-tsmc_55lp25  
Features
HDMI TX PHY 1.4 at 3.4Gbps in TSMC65LP
dwc_hdmi14_tx_phy_340gbps-tsmc_65lp25
Features
HDMI, 2.0, MHL, TX, PHY, 6Gbps, TSMC 28nm HPC
dwc_hdmi20_mhl_tx_ns_6gbps_tsmc_28hpc18
Features
HDMI, 2.0, MHL, TX, PHY, 6Gbps, TSMC 28nm HPM
dwc_hdmi20_mhl_tx_ns_6gbps_tsmc_28hpm18
Features
HERON-FPGA
Features
High Data Rate Demodulator (HDRM-D)
Features
High performance floating-point multiplier
DWFC_fp_fxp2fp
Features
High performance floating-point multiply-and-add
DWFC_fp_fp2fxp
Features
High performance PCIe-AXI Bridge and/or high channel count DMA
Expresso DMA Bridge Core
Features
High Speed Iterative Decoder (100 Mbit/sec)
S1000
Features
High-Performance DDR3/3L Memory Controller
S3C-DDR40-HPC
Features
High-performance floating-point adder
DWFC_fp_2sqrsum
Features
High-performance floating-point adder/subtractor with dual outputs
DWFC_fp_add
Features
High-performance floating-point comparator
DWFC_fp_avg2
Features
High-performance processor with Linux acceleration package
dwc_arc_770D_core
Features
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for GLOBALFOUNDRIES 40LP
dwc_duet_embedded memories_logic libraries_gf 40lp
Features
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for GLOBALFOUNDRIES 55LPE
dwc_duet_embedded memories_logic libraries_gf 55LPe
Features
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for SMIC 40LL
dwc_duet_embedded memories_logic libraries_smic 40ll
Features
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for SMIC 65LL
dwc_duet_embedded memories_logic libraries_smic 65LL
Features
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for TSMC 16FF+ GL/LL
dwc_duet_embedded memories_logic libraries_tsmc 16ff+ gl_ll
Features
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for TSMC 16FFC
dwc_duet_embedded memories_logic libraries_tsmc16ffc
Features
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for TSMC 28HP
dwc_duet_embedded memories_logic libraries_tsmc 28hp
Features
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for TSMC 28HPC
dwc_duet_embedded memories_logic libraries_tsmc 28hpc
Features
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for TSMC 28HPC+
dwc_duet_embedded memories_logic libraries_tsmc28hpcp
Features
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for TSMC 28HPM
dwc_duet_embedded memories_logic libraries_tsmc 28hpm
Features
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for TSMC 40LP
dwc_duet_embedded memories_logic libraries_tsmc 40lp
Features
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for TSMC 65LP
dwc_duet_embedded memories_logic libraries_tsmc 65LP
Features
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for UMC 28HLP
dwc_duet_embedded memories_logic libraries_umc28hlp
Features
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for UMC 40LP
dwc_duet_embedded memories_logic libraries_umc 40lp
Features
HIP 3000
Features
HIP 3100
Features
HIP 3300
Features
HIP 3510
Features
HIP 3700
Features
Hs-Mode I2C Controller
Features
Hybrid Viterbi eSi-7591
Features
HyperDrive Multi-port DDR2 Memory Controller
Features
I2C High Speed Bus Controller (I2C-HS)
IP6513E
Features
I2C Slave Controller
DB-I2C-S
Features
I2S Single Channel Inter-IC Sound Bus Controller
IP6716E
Features
IEEE 1394 AVLink
dwc_1394_av_link-dtcp
Features
IEEE-754 Floating Point FFT/IFFT IP core
Features
IEEE754 compliant single and/or double precision floating point unit for ARC EM processor cores
dwc_arc_fpu
Features
IMS16E
Features
In-System Sources & Probes
iniDSP, a 16-bit fixed-point general purpose DSP
Features
iniLCDC
Features
Instruction-Side On-Chip Memory (ISOCM) Bus
Features
INT 1020 Giga-bit Multi-port Switch
Features
INT-1000 10/100/1000 M bit MAC EngineC
Features
INT-10000 10-Gbit Ethernet MAC Engine
Features
INTCmodule
Features
Integrated Core Solution (ICS)
Features
Integrated Solution - PCI Express to DDR Controller/SBSUBPCIE2DDR
Features
Integra™ AXI Memory Controller for Embedded SRAM/ROM
Features
Integra™ AHB Memory Controller for Embedded SRAM/ROM
Features
Integra™ QoS Engine
Features
INTELLITM DDR2/DDR3 800Mbps to 1600Mbps SDRAM MEMORY CONTROLLER
Features
INTELLI™ DDR1/2 800Mbps PHY+DLL FOR HIGH-PERFORMANCE SDRAM MEMORY CONTROLLERS
Features
INTELLI™ DDR1/DDR2 800Mbps MEMORY CONTROLLER
Features
INTELLI™ DDR2/DDR3 1600Mbps PHY+DLL AND I/O FOR HIGH-PERFORMANCE DRAM MEMORY CONTROLLER
Features
INTELLI™ DDR2/DDR3 1600Mbps PHY+DLL FOR HIGH-PERFORMANCE DRAM MEMORY CONTROLLERS
Features
INTELLI™ DDR3 1.6Gbps PHY+DLL AND I/O FOR HIGH-PERFORMANCE DRAM MEMORY CONTROLLERS
Features
INTELLI™ DDR3 1600Mbps PHY+DLL HARD MACRO FOR HIGH-PERFORMANCE SDRAM MEMORY CONTROLLERS
Features
INTELLI™ GDDR MEMORY CONTROLLER FOR GRAPHICS
Features
INTELLI™ LOW POWER DDR MEMORY CONTROLLER
Features
Intelli™ Memory Interface
Inventra FEMI, FISPbus External Memory Interface; 8,500 gates (configurable), 75Mhz
IP for DisplayPort 1.3 TX Controller
IP8540
Features
IP for Embedded DisplayPort 1.4 TX Controller
IP8542
Features
IP PCIe EZDMA2 for Xilinx FPGA
Features
IP PCIe2.0 EZDMA2 for Altera FPGA
Features
IP Prototyping Kit for DWC DDR uMCTL2 Controller on HAPS-DX7, DDR3/2 FPGA PHY, AXI tunnel to ARC SDP
dwipk_umctl2_eddr3phy_arc
Features
IP Prototyping Kit for DWC DDR uMCTL2 Controller on HAPS-DX7, DDR4 FPGA MultiPHY, AXI tunnel to ARC SDP
dwipk_umctl2_eddr4phy_arc
Features
IP Prototyping Kit for DWC Ethernet QoS Controller on HAPS-DX7, Xilinx GTH PHY, PCIe Connection for PC
dwipk_ethrntqos_xlnxphy_pcie
Features
IP Prototyping Kit for DWC HDMI 2.0 Tx Controller on HAPS-DX7, HDMI 2.0 TX PHY card, AXI tunnel to ARC SDP
dwipk_hdmi20tx_txphy_arc
Features
IP Prototyping Kit for DWC HDMI 2.0 Tx Controller on HAPS-DX7, HDMI 2.0 TX PHY card, PCIe connection for PC
dwipk_hdmi20tx_txphy_pcie
Features
IP Prototyping Kit for DWC MIPI CSI-2 Device Controller on HAPS-DX7, D-PHY card, AXI tunnel to ARC SDP
dwipk_csi2device_dphy_arc
Features
IP Prototyping Kit for DWC MIPI CSI-2 Host Controller on HAPS-DX7, D-PHY card, AXI tunnel to ARC SDP
dwipk_csi2host_dphy_arc
Features
IP Prototyping Kit for DWC MIPI DSI Host Controller on HAPS-DX7, D-PHY card, AXI tunnel to ARC SDP
dwipk_dsihost_dphy_arc
Features
IP Prototyping Kit for DWC PCIe Gen 3.0 x1 Controller on HAPS-DX7, Xilinx GTH PHY, PCIe connection for PC
dwipk_pcie3ep_xlnxphy_pcie
Features
IP Prototyping Kit for DWC PCIe Gen2 x1,x2,x4 Endpoint Controller on HAPS-80, Xilinx GTH PHY, PCIe connection for PC
dwipk_pcie2ep_80xlnxphy_pcie
Features
IP Prototyping Kit for DWC PCIe Gen3x1 Endpoint Controller on HAPS-DX7, PCIe 3.0 PHY (C10), PCIe connection for PC
dwipk_pcie3ep_10gphy_pcie
Features
IP Prototyping Kit for DWC PCIe Gen3x1 Root Complex on HAPS-DX7, PCIe 3.0 PHY (C8), AXI tunnel to ARC SDP
dwipk_pcie3rc_8gphy_arc
Features
IP Prototyping Kit for DWC PCIe Gen3x1 Root Complex on HAPS-DX7, Xilinx GTH PHY, AXI tunnel to ARC SDP
dwipk_pcie3rc_xlnxphy_arc
Features
IP Prototyping Kit for DWC SATA AHCI Host on HAPS-DX7, Consumer 6 Gig PHY card, PCIe Connection for PC
dwipk_ahsata_c6gphy_pcie
Features
IP Prototyping Kit for DWC SATA Device on HAPS-DX7, Consumer 6 Gig PHY card, AXI tunnel to ARC SDP
dwipk_dsata_c6gphy_arc
Features
IP Prototyping Kit for DWC UFS 2.X host controller on HAPS-DX7, M-PHY card, AXI tunnel to ARC SDP
dwipk_ufshost_mphy_arc
Features
IP Prototyping Kit for DWC UFS 2.X host controller on HAPS-DX7, M-PHY card, PCIe connection for PC
dwipk_ufshost_mphy_pcie
Features
IP Prototyping Kit for DWC USB 2.0 Hi-Speed OTG Controller on HAPS-DX7, USB2.0 PHY card, PCIe Connection for PC
dwipk_usb20otg_usb2phy_pcie
Features
IP Prototyping Kit for DWC USB 3.0 Device Controller on HAPS-DX7, SuperSpeed PHY card, AXI tunnel to ARC SDP
dwipk_usb30device_ssphy_arc
Features
IP Prototyping Kit for DWC USB 3.0 Device Controller on HAPS-DX7, SuperSpeed PHY card, PCIe connection for PC
dwipk_usb30device_ssphy_pcie
Features
Displaying 1301-1400/3526
CST Webinar Series
S2C: FPGA Base prototyping- Download white paper



Internet Business Systems © 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy