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Displaying 1401-1500/3499

JVC's Color Management IP
Features
JVC's FRC IP
Features
JVC's Object-Based Gloss Enhancer IP
Features
Key Expander Core
KEXP
Features
Kintex-7 FPGA Display Kit
TB-7K-ACDC-FND
L2SEC – High-Performance IEEE 802.1AE (MACSec) Processing Engine
Features
LatticeECP2/M 7:1
LCD Controller-TFT LCD Panels (AX14 Bus)
DB9000AX14
Features
LCD/TFT Display Controller
Features
LDO
CT21406
Features
LDPCDEC11NR - LDPC Decoder for 802.11n / 802.11ac
Features
LDPCDECADR - 802.11ad LDPC Decoder
Features
LDPCENC11NR - 802.11n / 802.11ac LDPC Encoder
Features
LDPCENCADR - 802.11ad LDPC Encoder
Features
LDS-SATA-HOST-STR4GX
Features
LDS-SATA-HOST-XV5
Features
LDS_SATA_DEVICE_AR2GX
LDS_SATA_HOST_AR2GX
LDS_SATA_HOST_XF5
Features
LDS_SATA_HOST_XV5
Features
Leading signs detector
DWFC_fp_multifunc
Features
Leading zeros detector
DWFC_fp_scale
Features
Legacy-Configurable 8051-Compatible Microcontroller IP Core
L8051XC1
Features
LEON3
Features
Level-2 Cache plus Memory Tracker Technology
L2+ Cache
Features
LIN Bus Master/Slave Controller Core
LIN
Features
LinkWayS2™ Broadband VSAT System
Features
LINUX IPSEC REFERENCE DESIGN
ESS-03
Features
LJPEG-D -- Lossless JPEG Decoder Core
Features
LJPEG-E
Features
LJPEG-E -- Lossless JPEG Encoder Core
Features
LMS Adaptive Channel Equalizer
AH1001
Features
logi3D
Features
logiADAK Zynq-7000 SoC Automotive Driver Assistance Kit
logiADAK
Features
logiAIR
Features
logiAIR
Features
logiBAYER
Features
logiBITBLT
Features
logiBITBLT
Features
logiBMP
Features
logiCAN
Features
logiCAN
Features
logiCRAFT-CC-Elite Companion Chip Kit
logiCRAFT-CC-Elite
Features
logiCRAFT-CC-Premier Companion Chip Platform
logiCRAFT-CC-Premier
Features
logiCRAFT2
Features
logiCRAFT3
Features
logiCVC
Features
logiCVC
Features
logiCVC-ML
Features
logiCVC-ML
Features
logiHAC
Features
logiI2C Serial Bus Controller
logiI2C
Features
logiI2S
Features
logiI2S
Features
logiLENS
Features
logiLMD Lane Marking Detector
logiLMD
Features
logiMEM
Features
logiMEM
Features
logiMEM_arb Memory Controller and Arbiter
logiMEM_arb
Features
logiMLB Media Local Bus Interface
logiMLB
Features
logiPDET Pedestrian Detector
logiPDET
Features
logiRC
Features
logiRC
Features
logiREF-ZGPU-TED 2D/3D GPU Zynq Ref Design (TED inrevium)
logiREF-ZGPU-TED
Features
logiREF-ZGPU-ZC706 2D/3D GPU Zynq Ref Design (ZC706)
logiREF-ZGPU-ZC706
Features
logiREF-ZGPU-ZED 2D/3D GPU Zynq Ref Design (ZedBoard)
logiREF-ZGPU
Features
logiSDHC SD Card Host Controller
logiSDHC
Features
logiSPI SPI to AXI4 Controller Bridge
logiSPI
Features
logiSTEP Stepper Motor Controller
logiSTEP
Features
logiTAP
Features
logiUART
Features
logiVIEW Perspective Transformation and Lens Correction Image Processor
logiVIEW
Features
logiWIN
Features
logiWIN
Features
Low Profile Board XpressGX4-LP Based On Altera FPGA
Features
Low Profile Board XpressGX5-LP HE based on Altera FPGA
Features
Low-Latency AVC/H.264 Baseline Profile Decoder Core
H264-D-BP
Features
Low-pass filter
180SMIC_LPF_01
Features
Low-Power AVC/H.264 Baseline Profile Decoder Core
H264-LD-BP
Features
Low-Power AVC/H.264 Baseline Profile Encoder Core
H264-E-BPS
Features
Low-Power AVC/H.264 Main Profile Encoder Core
H264-E-MPS
Features
LPDDR2 SDRAM Controller
Features
LPDDR2 SDRAM Controller Core
Features
LVDS
CL11001
LVDS (FPD-link)
CL12451
M-JPEG Dec
Features
M-JPEG Enc
Features
M-PHY
Features
M1284H-A1 IEEE 1284 Host Parallel Port; 79 unidirectional I/O ports, 60.5% utilization of an A54SX16A FPGA, 333 S modules, 545 C modules, 57 MHz Post layout per
M16450
Features
M16550
Features
M16550A-B1 Enhanced UART w/FIFO; 346/1536 macrocells, 3/12 channel memory blocks and 43/294 unidirectional I/O ports of CY39100V676-200MBC CPLD device utilized,
M16C450D1 UART; 434 Logic Cells and 41 I/Os of 20K400EFC672 PLD device utilized, 111 MHz post layout performance
M16X50-A1 Enhanced UART; 43 unidirectional I/O ports, 16-byte Rx and Tx FIFOs, 56.8% utilization of an A54SX32A FPGA, 639 S modules, 997 C modules, 25 MHz post
M16X50-B1 Enhanced UART; Choice of 16, 32, 64 of 128 byte FIFO, 403, 411, 419 or 427/1536 macrocells used depending upon FIFO size, 3/12 channel memory blocks a
M429T1R1
Features
M68C429A
Features
M8051WARP-A1 8-bit Microcontroller; 227 unidirectional I/O ports, 73.7% utilization of an A54SX32A FPGA, 459 S modules, 1666 C modules, 40 MHz post layout perfo
M82365SL-A1 PCMCIA PC Host Interface; 161 unidirectional I/O ports, 65.9% utilization of A54SX72A FPGA, 883 S modules, 3095 C modules, Post layout performance i
M82371IDED1 IDE Controller ATA-4; 7173 Logic Cells and 245 I/Os of 20K400EFC672 PLD device utilized, 38.5 MHz post layout performance
Displaying 1401-1500/3499
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