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Floating Point Megafunctions
FOD0A_A25_33VT_GENERIC_IO
Features
FOD0A_A25_T25_Generic_IO
Features
FOD0K_A25_TMVH33L18_Generic_IO
Features
FR8052
Features
FSA0A_C_T33_Generic_EF_IO
Features
FSA0A_D_GENERIC_CORE
Features
FSA0L_D_GENERIC_CORE
Features
FTDDR020_S
Features
FTDDRII020S
Features
FTIIC010
Features
FXDAC120H90A
Features
FXPLL200HD0A
Features
FXREG050H80F
Features
G.975 I.4 BCH/RS EFEC
G.975 I.7 BCH/BCH EFEC
G13LPDG_LDWPD_01---GSMC 0.13μm 1.5V/12V Light Detect with Photodiode
Features
G13LPDG_PLL_01---GSMC 0.13um 1.5v APLL
Features
G13LPDG_POR_01---GSMC 0.13um Low Power e-Flash 1.5V POR
Features
G13LPDG_PRG_01---GSMC 0.13μm 5v-3.3v&1.5v Power Regulator
Features
G13LPDG_VDT_01---The present IP is a VCC Detector (VDT) circuit. It detects the voltage level of I/O (VIN).
Features
G13V33LPDG_USB11_02---crystalless USB1.1 PHY
Features
G2 AES Core - Altera Edition
AES-G2
Features
G2 AES Core - Platinum Edition
AES-G2
Features
G2 AES Core - Xilinx Edition
AES-G2
Features
GF13V33_DCDCBK_04---GLOBALFOUNDRIES 0.13um 3.3V-1.2V 200mA Synchronous Buck DC-DC
Features
GF13V33_DCDCBK_04B---GLOBALFOUNDRIES 0.11um 3.3V-1.2V 200mA Synchronous Buck DC-DC
Features
GF13V33_POR_01---GLOBALFOUNDRIES 0.13um 1.2V POR
Features
GF13V33_POR_01B---GLOBALFOUNDRIES 0.11um 1.2V POR
Features
GF40LPV25_ADC_08---GF40nm 12-bit 1M/200K Single/Differential 2.5v Rail to Rail SAR ADC
Features
GFP-T Processor IP Core (GFPT)
Features
Gigabit Ethernet MAC IP Core
Features
GRFPU
Features
GRSPW
GSMC18_MULTIO_02---GSMC 0.18um 1.8V/3.3V Multiple I/O
Features
GSMC18_MULTIO_03---GSMC 0.18um 1.8V/3.3V Multiple I/O
Features
GSMC18_MULTIO_05
Features
GSMC18_POR_03---GSMC 0.18um Power-On Reset
Features
GSMC18_R2RDAC_04---GSMC 0.18um 11Bit 500Ksps R2R DAC
Features
H.264 Video Over IP – HD Encoder Subsystem
H264OIP-HDE
Features
H.264/AVC Baseline Encoder
2.0000
Features
H16450S -- Synchronous 16450 UART Core
Features
H16550S -- Synchronous 16550 UART with FIFO Core
Features
H16750S -- Synchronous 16750 UART with FIFO & IrDA Core
Features
HDL DH MIPI M-PHY TRANSMITTER IP Core
Features
HDLC Controller
Features
HDMI v1.4 Transmitter IP Core
Features
High performance PCIe-AXI Bridge and/or high channel count DMA
Expresso DMA Bridge Core
Features
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for TSMC 28HP
dwc_duet_embedded memories_logic libraries_tsmc 28hp
Features
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for TSMC 28HPM
dwc_duet_embedded memories_logic libraries_tsmc 28hpm
Features
Hs-Mode I2C Controller
Features
Hybrid Viterbi eSi-7591
Features
I2C - Inter Integrated Circuit
IP6510
Features
I2C -- Philips Serial Bus Interface Core
Features
I2C Bus Master Controller Core
I2C-M
Features
I2C Bus Slave Controller Core
I2C-S
Features
I2C High Speed Bus Controller (I2C-HS)
IP6513E
Features
I2C Slave Controller
DB-I2C-S
Features
I65GV25_ADC_08---IBM 65nm 12-bit 1M/200K Single/Differential 2.5v Rail to Rail SAR ADC
Features
I65LPEV25_ADC_08---IBM 65nm 12Bit 1M/200K Single/Differential 2.5v Rail to Rail SAR ADC
Features
I65LPEV25_AMP_01---IBM 65nm Voltage Buffers
Features
I65LPEV25_PLL_01---IBM10LPE 1.2v/2.5v
Features
I65LPEV25_R2RDAC_01---IBM10LPE 1.2v/2.5v 11bit R2R DAC
Features
IEEE 1149.7 Compact JTAG
Features
IEEE 802.11ad (WiGig 60GHz) LDPC Decoder
Features
IEEE 802.11n/802.11ac (WiFi) LDPC Decoder
Features
IEEE 802.15.3c (60 GHz PHY) Multi-Gbit/s LDPC Decoder
Features
IEEE 802.1ae MACSEC IP Core for 10 Gbit Ethernet
MACSEC-10G
Features
In-System Sources & Probes
IndigoVision's Control Center
Features
iniCPU, a 8-bit microprocessor
Features
iniFUART
Features
iniG704-E1
Features
iniG704-E1
Features
iniUART
Features
iniUART
Features
Inrevium V-by-One HS IP Core
TIP-VBY1HS
Features
INT 1020 Giga-bit Multi-port Switch
Features
INT-1000 10/100/1000 M bit MAC EngineC
Features
INT-10000 10-Gbit Ethernet MAC Engine
Features
Int-11500
Features
INTCmodule
Features
Integrated PCI Core
Features
Interlaken VIP
Features
Interlaken, 150G, 24 Lanes
IP Core implements the error-correcting coding I.6 LDPC super FEC code code for the ITU-T G.795.1 recommendation
I.6 LDPC Codec
IP PCIe EZDMA2 for Xilinx FPGA
Features
IP PCIe2.0 EZDMA2 for Altera FPGA
Features
IP Prototyping Kit for DWC DDR uMCTL2 Controller on HAPS-DX7, LPDDR4 emulation MultiPHY, AXI tunnel to ARC SDP
dwipk_umctl2_elpddr4phy_arc
Features
IP Prototyping Kit for DWC Ethernet QoS Controller on HAPS-DX7, Xilinx GTH PHY, PCIe Connection for PC
dwipk_ethrntqos_xlnxphy_pcie
Features
IP Prototyping Kit for DWC Ethernet XGMAC Controller on HAPS-DX7, Xilinx GTH and Ethernet PHY, PCIe Connection for PC
dwipk_ethrntxgmac_xlnxphy_pcie
Features
IP Prototyping Kit for DWC HDMI 2.0 Tx Controller on HAPS-DX7, HDMI 2.0 TX PHY card, AXI tunnel to ARC SDP
dwipk_hdmi20tx_txphy_arc
Features
IP Prototyping Kit for DWC MIPI CSI-2 Host Controller on HAPS-DX7, D-PHY card, AXI tunnel to ARC SDP
dwipk_csi2host_dphy_arc
Features
IP Prototyping Kit for DWC PCIe Gen 3.0 x1 Controller on HAPS-DX7, Xilinx GTH PHY, PCIe connection for PC
dwipk_pcie3ep_xlnxphy_pcie
Features
IP Prototyping Kit for DWC PCIe Gen3x1 Root Complex on HAPS-DX7, Xilinx GTH PHY, AXI tunnel to ARC SDP
dwipk_pcie3rc_xlnxphy_arc
Features
IP Prototyping Kit for DWC SATA AHCI Host on HAPS-DX7, Consumer 6 Gig PHY card, PCIe Connection for PC
dwipk_ahsata_c6gphy_pcie
Features
IP Prototyping Kit for DWC USB 3.0 Device Controller on HAPS-DX7, SuperSpeed PHY card, AXI tunnel to ARC SDP
dwipk_usb30device_ssphy_arc
Features
IP Prototyping Kit for DWC USB 3.0 Device Controller on HAPS-DX7, SuperSpeed PHY card, PCIe connection for PC
dwipk_usb30device_ssphy_pcie
Features
IP Prototyping Kit for DWC USB 3.0 Host Controller on HAPS-DX7, SuperSpeed PHY card, AXI tunnel to ARC SDP
dwipk_usb30host_ssphy_arc
Features
IP Prototyping Kit for DWC USB 3.0 Host Controller on HAPS-DX7, SuperSpeed PHY, PCIe connection for PC
dwipk_usb30host_ssphy_pcie
Features
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Displaying 301-400/709
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