IPC INDIA 2014 is co-located at electronica India & productronica India 2014, starting 23-25 September 2014 at Bangalore International Exhibition Centre (BIEC), Bangalore, India.
Besides excluive IPC India Pavilion, IPC India also concurrently offers exciting learning and networking opportunities in the form of Workshops, Technical Conference and conducts IPC Hand Soldering Competition where the best-of-the-best hand soldering technicians showcase their skills in compliance with industry standards.
Accellera is sponsoring the 2014 debut of DVCon India.
The event will be attended by industry leaders, system architects, verification experts, SoC integrators, chip designers, IP developers, VIP developers and firmware engineers. The conference has two parallel tracks:
Date: September 25-26, 2014 – Bangalore, Inida
Conference: Sep. 28 - Oct.
Exhibition: Sep. 30 - Oct.
The time is right to
stimulate your thinking and catalyze new success — be ready for the new market
rise. Innovation always leads the way so join us as we explore emerging and
evolving technologies from around the world. The 2013 ET Summit has the largest
array of timely topics we've ever assembled. Learn the roadmaps and technology
details from leaders of the industry on printed electronics, one of the most
rapidly growing of microelectronics fields.
This year’s theme, Materials Matter—Enabling the Future of IC Fabrication and Packaging, will take a broad look at what is driving the demand for new materials, and how material suppliers are being impacted by the value chain they serve.
A chance to understand how one of the world’s largest forums influences worldwide chip design.
This year, the forum is a day-long conference kicking-off with Trend-setting addresses and announcements from TSMC executives.
The technical sessions are dedicated 30 selected technical papers from TSMC's EDA, IP, Design Center Alliance and Value Chain Aggregator member companies, and an Ecosystem Pavilion featuring up to 80 member companies showcasing their products and services.Hear directly from ecosystem companies about their TSMC-specific design solutions Network with your peers and 1,000 industry experts and end users.Attendees will learn about:
Date: September 30 – San Jose, CA
Ranked one of the top three must-attend events in the embedded industry, ARM® TechCon™ is more than a conference. ARM TechCon’s unique 360-degree interactive training ground is seeded to connect, instruct, advise and enable the world of electronic and ARM-based computer design, and provide attendees with a comprehensive understanding of ARM-based technology.
The IEEE-SA Symposium on Electronic Design Automation (EDA) and Intellectual Property (IP) Interoperability is intended to help members of the electronics/semiconductor design and verification community better understand the landscape of EDA and semiconductor intellectual property (IP) standards, as well as the role of these standards to address industry interoperability challenges.
ALPEXPO is the place in Grenoble where SEMICON Europa 2014 will be hosted. The event is organized with the commitment and support of European associations. SEMI and our partners are committed to ensuring the continued success of the event in Grenoble through increased engagement with IC manufacturers, equipment and materials companies, and other customer industries.
Welcome & Introduction: Costas Conistis, Synopsys & Technical Chair Paul Lungu, Ciena
Keynote Address: Addressing Today's Increasing Design Complexity Through Innovation and Collaboration Chi-Foon Chan, President and co-CEO - Synopsys
The Conference on Design and Architectures for Signal and Image Processing DASIP addresses the development of complex applications involving signal, image and control processing based on a new approach called Algorithm-Architecture-Matching, which aims to leverage the design flow by a simultaneous study of both algorithmic and architectural issues, taking into account multiple design constraints, as well as algorithm and architecture optimizations.
The goal of DASIP is to present the latest results in the domain of design and architecture for signal and image processing along several axes: methods and tools; development platforms, architectures and technologies; use-cases and applications as well as smart sensing systems.
ATRENTA'S USER CONFERENCE 2014 Oct 8, 2014 in the BRAND NEW LEVI’S STADIUM in Santa Clara, CA
October 8, 2014 in Santa Clara, CA. Attendees will have the opportunity to gather with designers, engineers, and managers from around the world to share the latest in SpyGlass, GenSys and BugScope, usage and best practices. ATRENTA WORLD is an in-depth technical conference, presented by users, which focuses on the needs of the Atrenta user community. This will also be a great networking opportunity with other users.
Our list of guest speakers and users include individuals from
Qualcomm, Cisco Systems, TI, TSMC and the San Francisco 49ers.
Stay tuned for more details as they become available.Date: Oct 8, 2014
New Levi's Stadium in Santa Clara, CA
Forum on specification & Design Languages (FDL) is a well established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modelling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems. Modelling and specification concepts push the development of new design and verification methodologies to ESL (Electronic System Level) thus providing a means for model-driven and automated design of complex electronic systems in a variety of application domains. FDL gives an opportunity to gain up-to-date knowledge in many broad areas of the fast evolving field of system design and verification. Through collaboration with the Accellera Systems Initiative FDL maintains a strong link to many EDA standards like SystemC, OCP and IP-XACT.
FDL 2014 is organized by ECSI in technical cooperation with the IEEE Council on Electronic Design Automation (CEDA). The FDL proceedings will be made available online after the conference in the ECSI Resource Center and will be submitted for inclusion into IEEE Xplore.
The Design and Verification Conference & Exhibition Europe is a new conference for the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. Sponsored by Accellera Systems Initiative, DVCon Europe brings chip architects, systems designers, software developers and IP integrators the latest methodologies, techniques, applications and demonstrations on the practical use of EDA and IP languages and standards used in electronic design. DVCon Europe will bring:
Register now for MemCon 2014! Complimentary registration will be granted to all industry professionals. Note: Business cards will be required at check-in. Seating is limited so reserve your place by registering today. Conference registration includes access to:
CPSArch 2014First Workshop on Cyber-Physical System Architectures and Design MethodologiesOctober 17, 2014, New Delhi, India. Held as part of ESWEEK 2014.Call for Papers (CFP):Important Dates: Papers due - August 1, 2014 (by midnight, PDT)Acceptance notification - September 1, 2014Final papers due - September 20, 2014Workshop date - October 17, 2014
Workshop Background and Goals
The CPSArch 2014 workshop (http://cpsarch.ecn.purdue.edu/)seeks original submissions on all topics related to hardware/software architectures and design methodologies for cyber-physical systems.Submissions will be judged based on originality, technical merit, topical relevance, and likelihood of leading to insightful discussion at the workshop. Papers must not have been published elsewhere and may not be simultaneously under submission at another venue.
Workshop Date: Oct. 17, 2014, New Delhi, India