Events - December 2014

Submit Events

SEMICON Japan 2014 - Dec. 3 - 5, 2014 - Tokyo Big Sight, Tokyo, Japan
Date: December 3 - 5, 2014
Place: Tokyo Big Sight
3 Chome-11 Ariake, Tokyo, Japan

SEMICON Japan 2014: New Venue and New Ideas for Rebounding Industry

SEMICON Japan 2014, the largest exhibition in Japan for semiconductor manufacturing and related processing technology, will take place at its new venue in Tokyo Big Sight in Tokyo on December 3-5.

SEMICON Japan 2014 will bring Japan’s rebounding semiconductor equipment market into focus and the underlying technology and business drivers.  SEMICON Japan will enable attendees to explore key technologies and business models necessary to grow in the coming years. On December 3, SEMICON Japan opens at 9:30am with a full day of speakers including:  

  • Accenture Japan Ltd — Chikatomo Hodo, president and country managing director
  • IBM Japan — Chieko Asakawa, IBM fellow
  • Scripps Translational Science Institute — Donald Jones, chief digital officer
  • Toyota — Tokuhisa Nomura, executive general manager
  • Intel Japan — Makiko Eda, GM and president of Intel Japan
  • ARM K.K. — Yuzuru Utsumi, president
  • Toshiba — Yasuo Naruke, executive officer, corporate EVP and CEO, semiconductor & storage
  • National Institute of Information and Communication Technology (NIICT) — Miwako Doi, auditor

Date: Dec. 3 - 5, 2014 
Tokyo Big Sight, Tokyo, Japan

3D ASIP Conference
Date: December 10 - 12, 2014
Place: The Hyatt Regency San Francisco Airport
1333 Bayshore Highway , Burlingame, CA 94010 USA

Mark your calendar and plan to attend the 11th annual 3D ASIP conference. 3D ASIP gives you the opportunity to gain the latest and most comprehensive insights on market trends, and manufacturing and technology developments in the world of advanced interconnect and packaging.

IEEE Electrical Design of Advanced Packaging & Systems Symposium. Dec 14 - 16, 2014 in India
Date: December 14 - 16, 2014
Place: World Trade Centre
Brigate Gateway, Malleswaram West,, Bangalore, India

The IEEE Electrical Design of Advanced Packaging and Systems (EDAPS) Symposium has been one of the main events in the Asia Pacific region with a focus on the electrical design of chip, package and systems for electronics applications. For more than a decade, this symposium has attracted world class researchers from both academia and industry to share their state-of-the-art results in chip, package and printed circuit board design and measurements. The symposium consists of keynote and invited talks from experts, paper presentations, industry exhibition, tutorials and an informal social setting for networking.

Dates: 14 Dec, 2014  To: 16 Dec, 2014
Location: World Trade Centre, Brigate Gateway, Malleswaram West, Bangalore, India.

SEMICON Russia 2015
Date: December 19 - 26, 2014
Place: Moscow, Russia

SEMICON Russia is the window and connection to the Russian semiconductor and microelectronics markets. It is the one must-attend event to gain information on opportunities in Russia.

Free VLSI Technical Workshop on 20th December
Date: December 20, 2014
Place: #37, 1st Floor, 2nd Cross, GK Govinda Reddy Layout, Opp. Arekere Mico Layout Mai
Bangalore, 560076 India

Dear Student,

 Greetings from Maven Silicon, India's leading VLSI Training company!!

 Maven silicon invites you for a free half day workshop on VLSI Technology on 20th December 2014!!

 The workshop aims at giving you an overview of RTL Design, Verification and Synthesis.

Highlights of the Workshop:

1. Knowledge sharing by veteran trainer Mr. Sivakumar (CEO - Maven Silicon) with the experience of 17+ years’ in VLSI industry.

2. Maven CD which has projects and Video tutorial.

3. Scholarship coupon worth of Rs.10,000/-

4. Maven Certificate for the participants and much more……

Workshop Topic: RTL Design, Verification and Synthesis

Date :
20/Dec/2014, Saturday
Time : 9 AM to 1 PM
Speaker :
Mr. P R Sivakumar , CEO Maven Silicon,
Venue :
Maven Silicon

Agenda :

  • Overview of VLSI Design
    • IP, Chips and SoCs
  • Introduction to VLSI Design Flow
    • Front End Vs Back End
  • RTL Design using HDL
    • Verilog Vs VHDL
    • Overview of Verilog
  • Functional Verification
    • SystemVerilog and UVM based testbenches
    • Code and Functional coverage
  • Indian Semiconductor Industry
    • Products and road maps
    • Job Oppertunities
    • VLSI Finishing school
  • Technical Quiz
  • Gifts and Certificate Distribution


1.    Entry to the workshop is FREE.

2.    Limited seats available.

3.    Entry on first come first serve basis.

Register for Workshop at





CST Webinar Series

Synopsys: Custom Compiler

Featured Video
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
PCB Tools, Part 2: Request for info
More Editorial  
Electronics Firmware / Digital DesignEngineer 2 for Northrop Grumman at Rolling Meadows,, IL
Manager, Field Applications Engineering for Real Intent at Sunnyvale, CA
Upcoming Events
2016 GreenBuild International Conference and Expo at Los Angeles Convention Center Los Angeles CA - Oct 5 - 6, 2016
DASIP 2016 at Rennes France - Oct 12 - 14, 2016
SystemC AMS & COSIDE® User Group Meeting 2016 at Maritim Hotel Munich Germany - Oct 18, 2016
CST Webinar Series
S2C: FPGA Base prototyping- Download white paper

Internet Business Systems © 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy