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  • © 2007

Digital Signal Processing with Field Programmable Gate Arrays

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Part of the book series: Signals and Communication Technology (SCT)

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Table of contents (9 chapters)

  1. Front Matter

    Pages I-XX
  2. Introduction

    Pages 1-52
  3. Computer Arithmetic

    Pages 53-163
  4. Fourier Transforms

    Pages 343-400
  5. Advanced Topics

    Pages 401-475
  6. Adaptive Filters

    Pages 477-535
  7. Microprocessor Design

    Pages 537-644
  8. Back Matter

    Pages 645-774

About this book

Field-Programmable Gate Arrays (FPGAs) are revolutionizing digital signal processing as novel FPGA families are replacing ASICs and PDSPs for front-end digital signal processing algorithms. So the efficient implementation of these algorithms is critical and is the main goal of this book. It starts with an overview of today's FPGA technology, devices, and tools for designing state-of-the-art DSP systems. A case study in the first chapter is the basis for more than 40 design examples throughout. The following chapters deal with computer arithmetic concepts, theory and the implementation of FIR and IIR filters, multirate digital signal processing systems, DFT and FFT algorithms, advanced algorithms with high future potential, and adaptive filters. Each chapter contains exercises. The VERILOG source code and a glossary are given in the appendices. This edition has a new chapter on microprocessors, new sections on special functions using MAC calls, intellectual property core design and arbitrary sampling rate converters, and over 100 new exercises.

Reviews

From the reviews:

"5 Stars: this book is well written and covers many of the aspects of DSP with FPGAs. I run a business that specializes exclusively in high performance DSP designs using FPGAs. This book pretty much covers it all, in fact it closely parallels the material we present in our DSP for FPGAs seminar. I very highly recommend this book."

Ray Andraka of Andraka Consultants, N. Kingstown, RI

"This second edition provides new material on the design of serial and array dividers, the description of a complete floating-point library, and adaptive filter design. Over 25 additional exercises as compared to the first edition are also included in the book. It is worth noting that there are two appendices on the Verilog source code … and furthermore a glossary of the abbreviations typical in the field are provided." (Zentralblatt MATH, Vol. 1050, 2005)

Authors and Affiliations

  • College of Engineering Department Electrical & Computer Engineering, Florida State University, Tallahassee, USA

    Uwe Meyer-Baese

Bibliographic Information

Buy it now

Buying options

eBook USD 99.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever

Tax calculation will be finalised at checkout

Other ways to access