Web event: New Advancements in Verification Methodology (VMM and UVM)
Date: July 28, 2011
Time:10:00 AM PDT
Duration: 45 minutes + Q&A
Learn about the latest improvements in verification performance and productivity including the benefits in the new features offered by Synopsys in support of standards-based SystemVerilog verification methodologies such as:
- VCS support for VMM, OVM, and UVM
- Utilities for OVM migration to UVM
- VMM/UVM Interoperability Kit
Speaker:
Adiel Khan
Senior Staff Engineer, Synopsys
Specialization in Verification Methodologies
Adiel Khan has been a Verification Specialist in the FPGA and ASIC industry for more than a decade. His portfolio consists of several interesting projects ranging from packet-based FPGA verification through micro-controller devices, to complex multiple CPU SoC architecture verification. At Synopsys, he works with key customers supporting them with their verification strategies whilst helping them develop and expand new or existing verification methodologies. Pulling from his experience in eRM, OVM and VMM he joined the Accellera VIP-TSC as a key contributor and technical leader to develop methodology interoperability libraries then the UVM open-source library.
Kiran Maiya
Senior Staff, Corporate Application Engineer, Synopsys
Kiran Maiya has been working in the verification field since 1999 at Synopsys, working with key customers in deploying verification methodology and addressing their challenges related to design verification. Prior to Synopsys, he worked at Texas Instruments in the software modeling team and also served at the India Space Research Organization as a scientist where he was involved in the development of onboard sensors for remote sensing satellites.
Michael Sanie
Director of Product Marketing, Synopsys Functional Verification
Michael Sanie is director of verification product marketing at Synopsys. He has more than 20 years of experience in semiconductor design and design software. Prior to Synopsys, Sanie held executive and senior marketing positions at Calypto, Cadence and Numerical Technologies. Sanie started his career as a design engineer at VLSI Technology and holds four patents in design software. He holds BSCEE and MSEE degrees from Purdue University and an MBA from Santa Clara University.