Sandipan Bhanot is the Founder and CEO. He has a 16 years track record in the EDA industry in various engineering, marketing and sales management roles. Before founding Knowlent, Sandipan was the senior product manager for the Silicon Ensemble product line at Cadence Design Systems. Before Cadence, he worked at Synopsys and SCL.
What was you motivation in starting Knowlent?
I always wanted to do something on my own. When I left Synopsys, I was thinking mainly I can do xyz but eventually ended up working for Cadence which was very good. I was an R&D engineer and now started working on my MBA. I made the transition direct to product marketing. After Cadence, it was around 2000, when everyone was becoming mega millionaires. I resisted the temptation to go into a dot.com but towards the end it was too much. It seemed that I was the only guy not jumping into new things. Maybe the valuations were somehow sustainable. Maybe, I was the only guy who didn't get it. So I ended up joining a dot.com. I joined with the understanding, no the expectation, that people joining at that time would make about $30 million. I was about employee number 100. The company's evaluation at that time was $100 million. Within 3 months it went to $850 million and 750 employees. Can you believe that? They were growing very, very fast. But then something started feeling wrong. It turned out that the bubble had finally burst. I ended up leaving and not making even $300. I thought that it was sign from God, basically saying that this is the time you can do something. After that I didn't send resumes to anybody. It was very clear that this was the time to go do something on my own.
What was the name of that company?
Loudcloud, the Mark Andressen company. I was used to looking at things in a strategic way and I could not figure out for the life of me, why they were doing certain things that they were doing. It just got to the point where it didn't make any sense from either perspective. It was kind of mutual that I left.
What were you looking for?
It was kind of the complete opposite of the VC driven, fully thought out MBA (even though I had an MBA at this point) type of venture. The start was more like a body shop. The first thing was somehow to get to a level where I was getting x dollars per month, where I could sustain myself. Very quickly I hooked up with the Tempus Fugit guys, the company that finally became Jasper Design Automation. At the time it was just the two founders, both were engineering oriented guys, PhDs from Berkley. With my marketing stuff, I thought hey, I can help you guys get sales but not really join you because that was not something I wanted to do. For the first six months working with them, I was trying to do sales. I had never done sales before in my life. It was picking up the phone, calling a customer. I got familiarized with the whole cold calling to close process. That was a very good experience. Here we were in the worst recession. We were trying to sell their products, sort of formal verification. The market itself had collapsed. We were a no name entity with no funding and just three guys. Six months down the line I was able to sell something and direct something into Knowlent. All this time I was thinking about what to do. But it was survival first and then thinking through what can we possible achieve. During that time as the marketing person for SI I would go to the library vendors and say why you need to do this, why you need to provide this and that from the library so people could use it. I would get blank stares from people all around. It became very clear to me that it was not a very scaleable business model. So I focused away from the on-chip SI to off-chip SI. It was all real-time marketing research. I started throwing that idea at people. Folks were very receptive. I hooked up with a few friends who could actually design those things. The first six to eight months we did some consulting around IO design and signal integrity. This gave me more insight into exactly what the problem was that people were trying to solve. We started building the product in late 2002. That's when the first official employee was brought on board.
This was in response to real customer problems that people want to pay money for. Going back to survival time, if people are not interest and don't want to pay for it, it's just research. We were very pragmatic.
How did you convince first yourself and later customers that what your product did what you were claiming?
The consulting came in very handy. We were essentially doing now what we had been doing using manual methods. People were paying us big dollars per hour. Customers would ask how much time it would take. We would say 200 hours. That was normal to them. It was alright, it was the way it was supposed to be. As a software person I would look at it and ask exactly what are you doing. You just do this and that, and then take this measurement. The value to me became very clear from then on. Initially, it was primarily a productivity thing. Overtime as we got more heavyweights into the company, it also became domain knowledge that many people might not have.
My question was not on the value of the solution but rather whether what you were developing did what you said it did.
One of our customers told us that if you think you will be able to check compliance, I have a device and a netlist for it. The silicon came back and it is bad. I am willing to give you the netlist. You run your product and tell me what I am seeing in the lab. So we spent about a week and were able to exactly pinpoint the problem in the netlist. That was the beginning of a relationship with that particular customer.
So prospects will likely benchmark your product with a design that they have had or are having trouble with?
That is the most common way. But overtime it is brand building Customers and prospects start trusting that you really do what you say you do.
You have twelve employees today. What is the marketing strategy for growth?
The marketing strategy is letting people know we exist, working with a PR firm (Georgia Marszalek, ValleyPR). We think that is extremely important. We just got word that our paper was accepted in the ARM's Developer Conference. We are going to DAC not with just a 10x10 both but with a 20x20 booth that should hopefully get us noticed. There's a PR/Brand building strategy that is very important.
Why is this important?
People have to believe and trust that what you do. One of the reasons that people don't buy is lack of trust. How do they know what we are saying is in fact true? Another reason people don't buy is the fear that they might not get the approval of their higher ups or peers. That's why branding becomes extremely important.
I had a conversation with Sanjay Srivastava, CEO of Denali Software Inc. who said “if people come to you, it is much easier to have a dialog and become customers as opposed to the other way round.” That's another thing that PR campaign can do very effectively. From our launch we stared talking to some key multi billion dollar customers who saw what we do and contacted us. We started from there.
Another aspect is relationships. If we try to build a channel and reach to each and every customer in the world, we will probably need tons of money and funding. But a much more effective way to do that is to really focus on hard core competencies, and partner with people like Denali, like Cadence, Mentor and Arm where we can very quickly and very accurately target the end customer. Leverage their channels and expertise and make it a win/win situation.
What is your sales model (direct, indirect)?
If you think of who can use the product, there are teams developing the PHY. There are less than 100 companies that undertake this extremely complicated IP which sells on the street for $250 thousand just because it is extremely hard to design. Tens and tens of people, multiple release spins, ambiguities in the spec and so forth. To these people we will sell direct. Then there are integrators who take the IP. They might be groups inside a large firm or independent companies. They take the IP designed by somebody else and want to put it on their silicon and make it work. The two segments have very different characteristics. The developers are experts in what they do. They are doing it all the time. This is their core competency. They consider themselves as guru analog designers and so on and so forth. Whereas the integrators have to do this as opposed to love to do this. When they get the IP, they are not interested in knowing how the protocol works. They just need to be sure it works. They will spend $50K to make sure it works. Their thinking is quite different. They are not continually integrating one piece of IP on their chip all year long. Generally design cycles are 12 - 18 months. If they have 5 interfaces on their chip, maybe they spend 2 to 3 months on each interface. So the value to them in terms of doing this particular piece is smaller. On the other hand if the full chip fails, the opportunity cost is huge. The number of people who integrate IP is in the thousands. This is something we can not reach with our puny sales channel at this point. For these customers we will probably go through PHY vendors, verification IP vendors or some other channel.
Given these differences in the market segments, will there be differences in the packaging and pricing of your products?
Absolutely! One of the things that we want to do, if we can, is to have the PHY vendors supply the settings of their PHY in our format to customers. Given that there is going to be a relatively short term license, the price should a fraction of the full product price paid by someone using the product over an entire year.
What will be the size of your firm in 12 to 18 months and how will you recruit?
Closer to thirty by the end of next year. Our business plan says we might go for a second round some time next year if it makes sense. Most of that will go to increase the channel. We need maybe four more people in R&D, the rest evenly split between channel and support.
When people ask 'When are we going public?', I say never. I have very realistic expectations. You know the EDA market. As a whole there has been consolidation. Even the IPOs that did happen were addressing huge markets by EDA standards. Nassda and Verisity were acquired. It is questionable how many companies can go IPO and really stay independent. Magma is one. The Magma/Synopsys litigation will be interesting to watch.
How difficult is it to recruit for a small startup?
People are looking for some upside but I think if you talk to people here, it is more than about the money. The folks from Cadence and other large companies could not see the impact of what they do. They were a tiny part of a gigantic machine. The goals of joining startups are slightly different than 3-4 years ago. It's not all about the money. Compensation has to be at least competitive, otherwise it would be tough. In our case we were extremely lucky to having our employees stay with us through very though times. It will be alright, if our ideas are right and if we have support from the investors. So far we have not had any issues in hiring.
Does the firm have any patents?
We will be filing patent applications on 3-4 ideas that we feel strongly are patentable. We will do that over the next few months.
My position is different from what you probably hear from others. I don't thing patents really give you anything. They do give a marketing boost. But at least in the software world, specifically in EDA, having a patent does not really mean that no one else will be able to build a similar tool. True competitive advantage comes from entrenchment. Once people are entrenched in your flow, using your formats, and your framework, then that truly becomes one of the biggest barriers for people to enter. I told the VC raising this round: You give me $10 million and tell me what product to build and I will build it. Patents will really not stop any new competitors coming into that market, if they think the market is there. In terms of differentiators, entrenchment is #1 in my mind.
So as long as we don't take ourselves too seriously and adapt to what the market is asking for, that's the key companies need have to have and I think we have it.
How large is the market for your products?
We have done some calculations and think it is somewhere between $100 million and $200 million. Gary Smith said “You can only track this type of market to $25 to $30 million and then they get sucked into one of the big flows one of the EDA vendors have.”
The company's mission is to try to be the leading provider of electrical verification and debugging platform combined with verification IP for high speed interfaces. How do you position your product?
As you know, verification itself is new and when people hear the term verification IP they are thinking testbench and Verilog, VHDL, e or Vera or something. Most of verification IP is focused on standard interfaces. Interface specification layers can be divided into two categories. The first includes transaction, data link and physical:logical layers, while the second covers the physical:electrical layers. For each category there is IP and IP verification. For the first category there is digital synthesizable RTL IP from the likes of Denali, nSys, Rambus and the big three EDA vendors. For this category there are functional verification platforms and verification IP from the likes of Verisity, nSys, Avery, Denali, Synopsys and Mentor. That is more or less a solved problem despite the fact that it is a relatively new development in our industry. For the second category there is hard analog IP from the likes of ARM, Rambus, Dolphin, Mentor and Synopsys. For this group Knowlent offers electrical verification platform and verification IP.
We have a software platform which is more or less similar to what e did for Verisity and we have verification for some of the most common serial interface protocols. We are completely complementary to the verification IP that exists at the digital level. In fact Denali is one of the original investors in our company; they have their own verification IP at the top levels. We act as a sort of platform for analog hard IP from companies such as ARM who is one of our customers.
Why does it make sense for a commercial entity to offer this solution now? Why didn't it happen up to now?
Memory speed started going up to where signal integrity on the interface started becoming a problem. If you look at serial interface or serial technology adoption rate, it is just beginning to take off in the last 3 or 4 years. Before that there was this whole optically related investment that was made during the bubble time. But at that time the price elasticity was simply not there. So finding the most optimal solution or a commercial solution that was also economical was last on people's priority list. If they had to spend the money and hire 50 people to do this job, they just went ahead and did that. Three things happened
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- the bubble burst
- serial interfaces started getting adopted - memory speed started going up |
What is the trend toward serialization?
It doesn't matter what segment of the industry we are looking at.
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Consumer: PCI Express, Serial ATA, USB 2.0
Networking: XAUI, 1/10 GigE, Ininiband, RapidIo Storage: Fibre channel, SAS, iSCSI Mobile Platform: CCP2, MIPI, SMIA Memory: FB DIMM |
What is the problem you are trying to solve?
We are solving the electrical verification problem, which is yet another name for the signal integrity problem. Basically making sure if you send a 1 or a 0 or a pulse across the channel, across the long bond wires of a packages across the Vias of the board along trace lengths that it is actually received despite all of the distortions that will happen and that it is received at speed by the receiver.
SoCs have become larger and larger and the packages have become very big. Seeing a package with 1,500 pins or 1,800 pins is pretty common these days. For most people the package is just a shell around silicon but that itself can have up to 26 to 28 layers. And designing that, making sure that we account for all the inductances and parasitics is paramount. If you don't do that, it is almost a guarantee that you will fail. Similarly the boards are becoming more complex.
API is one of our customers. Their DDRII interface is 256 bits wide. Just imagine if you took 256 bits, you need to be routing on the board and they all need to be pretty close to each other because you can't have too much skew and so on and so forth. This is just one piece. The severity of SI has blown up because of the complexity.
On the other hand the interface on the signal itself has become very, very sensitive, mainly for two reasons. One reason is that the speed is higher, which means the time period that is available to switch from one state to another is tiny. Another thing is that the voltages are very low. So even a few millivolts worth of noise can cause either failure that is a 1 is seen as a 0 or a 0 is seen as a 1. A second reason, even if that is not the case, is that it can effect the timing by changing the latency. And a third reason is because of the environment there are lots and lots of things switching at the seam time; so cross coupling issues, the inductive issues become much more pronounced.
How does the product work?
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Explain a bit more about adapters.
Adapters are a key piece of our IP. In digital simulation we have one DAT or one DUT. It is okay to pump millions and millions of test vectors into it, write assertions and to see where it works and where it doesn't work. It becomes quite different in the analog space, where you can not simply have one version of the netlist. You need 2 or 3 versions. Sometimes to run DC impedance; sometimes you need to attach the standard load and run transients; sometimes you want to attach the full channel model and make sure that at the far end you are still compliant with the spec. If you are running return-loss measurements, you need several different types of models. Sometimes you are testing RF and that's a different netlist because people generally want to break them up because it is tough for Spice to handle very vary large netlists. So we came up with this unique adapter concept. Just gives us your IP or DUT. We understand that it needs to be modified or setup differently for different types of tests. But we will do that. We provide the data in all the tests in the form of Spice IP which then gets connected to the DUT. Depending upon which adapters you connect, it is set up for a different group of tests. The adapter will typically include the kind of test vectors we want to pump in, the models that need to be attached, where to take measurements based upon what the spec says. Sometimes it is the pin of the package, sometime the connector, sometimes the input and so on and so forth.
After attaching all the adapters which will setup the DUT for all types of tests, we provide what I call the 'one-click' flow. You can launch everything in parallel. Designs keep getting adapted for different types and different groups of tests. We will run the tests, take the measurements and give you a table which is the summary of each and every test that the specs talks about. People will have the ability to see whether they are meeting the compliance; whether there are margin issues or not; and if there are problems, then they can go back and fix them.
Which interface does you product address?
In March we announced PCI Express Generation 1 and Serial ATA for about $65K for a one year license. Before DAC we will announce XAUI and DDRII. And after DAC, we will announce 1/10 GE, Hypertransport and PCI express G2. Eventually the idea is to give people a platform where they can build their own either custom or standard interface.
This is something that could happen at different levels. Here we are mainly talking Spice but as the abstraction level goes up on the analog side we have Verilog e, Verilog AMS and behavioral modeling that mimic some of the Spice type of effects. The adapters we have will change a little bit to stay in tune with that.
What are the primary benefits of your solution?
One benefit they get is 100% spec compliance. That's important because some things were extremely hard to do before our platform was in place. Many customers used to wait for silicon to come back and actually test it on the bench as opposed to doing extremely complicated measurements such as return loss and taking jitter and breaking it into deterministic, random and periodic jitter upfront. Clearly Spice simulators did not have that capability and it was very difficult to extract the data and write your own.
We have anecdotes from some companies of 5 respins of silicon. Silicon comes back, they try to debug, try to fix that, tape it out again and so on and so forth. There is a lot of time that used to be spent in setting up the design for various types of test that is now gone, given that we have the adapter technology. People do not have to worry about getting the various load modules, for example if you have a theta ribbon, how do you model that? If you have standard connectors, how do you model that? If you have standard memory parts that you want to test your DDRII interface with, how do you model that? All these standard types of models that are either specific to the interface or that are widely used are provided in the package
Analog designers are somewhat notorious for doing things their own way. Managers really like using a platform like this that becomes a standard methodology that is prevalent inside their company.
This is also a swift debugging environment capability platform where people across groups can share data and see what went wrong.
What do customers say about the product line?
Callan Carpenter, ARM's VP and GM of PHY Solutions, says "ARM's high-speed PHYs are at the forefront of the high-performance interface IP market. Our customers hold us to a high standard of quality, and Knowlent's OPAL EVP tools play an important role in helping us achieve that standard. The OPAL PCI Express EVP helped us save valuable time during the design of our 3G PHY, and introduced a measure of independence between the design and verification process - an important characteristic of any good verification strategy. We anticipate working closely with Knowlent as they develop EVPs to support additional interface standards."
What is your biggest challenge next year?
Our challenge at this point is just execution. We are a startup. We still don't have a lot of money. We must be very careful as to what we undertake. What do we do first? How do we prioritize? Other than execution, in terms of whether the market exists and whether the product is going to be built, the market and development risks in my mind are not that high. It is really the execution.
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