OCP-IP Announces Part 1 of Network On Chip Benchmarking Specification
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OCP-IP Announces Part 1 of Network On Chip Benchmarking Specification

BEAVERTON, Ore.—(BUSINESS WIRE)—March 3, 2008— OCP-IP today announced that part one of the Network On Chip (NoC) Benchmarking specification has entered member review. Part one of the specification details requirements and features for application programs, synthetic micro-benchmarks, and abstract benchmark applications. It discusses ways to measure and benchmark reliability, fault tolerance, and testability of the on-chip communication fabric.

This specification was completed with the collaboration of a number of world's most prestigious universities working on NoC research including: University of British Columbia, Carnegie Melon University, Royal Institute of Technology, Tampere University of Technology and Washington State University and was supported by cooperation and participation of industry members from the OCP-IP NoC Benchmarking Working Group (NoC BWG). These companies include: GreenSocs, Nokia, Sonics, Synopsys, Texas Instruments, and Toshiba.

Members wishing to review and comment on part one of the NoC spec or join the OCP-IP NoC Benchmarking Working Group are invited to immediately contact admin@ocpip.org. To download a free copy of OCP-IP's white paper discussing the topic of NoC Benchmarking, visit http://www.ocpip.org.

About OCP-IP

The OCP International Partnership Association, Inc. (OCP-IP), formed in 2001, promotes and supports the Open Core Protocol (OCP) as the complete socket standard ensuring rapid creation and integration of interoperable virtual components. OCP-IP's Governing Steering Committee participants include: Nokia (NYSE:NOK), Sonics Inc., Synopsys (SNPS), Texas Instruments (NYSE:TXN), and Toshiba Semiconductor Group (including Toshiba America TAEC). OCP-IP is a non-profit corporation delivering the first fully supported, openly licensed, core-centric protocol comprehensively fulfilling system-level integration requirements. The OCP facilitates IP core reusability and reduces design time, risk, and manufacturing costs for SoC designs. For additional background and membership information, visit www.OCPIP.org.

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