Real Intent Extends the Reach of Formal Verification, Showcases Formal Software for Timing Exception Verification and Assertion-Based Verification at DVCon
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Real Intent Extends the Reach of Formal Verification, Showcases Formal Software for Timing Exception Verification and Assertion-Based Verification at DVCon

Wednesday, February 21 and Thursday, February 22, Doubletree Hotel, San Jose, California

SANTA CLARA, CA--(MARKET WIRE)--Feb 13, 2007 --

Who:

Real Intent, the leading supplier of formal verification software for electronic design, is showcasing its verification software at the Design and Verification Conference & Exhibition (DVCon).

What:

Real Intent is demonstrating its EnVision(TM) family of software for formal verification. The demonstrations highlight timing exception verification with PureTime(TM), Assertion-Based Verification (ABV) with Conquest(TM) and Ascent(TM) and clock domain crossing checking with Clock Intent Verification(TM).

In addition, Real Intent is demonstrating how its software integrates with Novas' automatic debug system, Verdi(TM), to offer electronic designers better verification technology by combining property management and debugging capabilities with static formal analysis.

When:

Wednesday, February 21, 4:00 pm - 7:00 pm
Thursday, February 22, 4:00 pm - 7:00 pm

Where:

Doubletree Hotel
2050 Gateway Pl.
San Jose, CA 95110
Booth # 806

Information, Appointments and Registration Contacts:

For more information about Real Intent, please visit http://www.realintent.com.

To set an appointment with Real Intent, please contact:
Email Contact.

For more information about DVCon, please visit http://www.dvcon.org .

About Real Intent's Verification Software
Real Intent's EnVision family includes: PureTime, for detecting timing exception errors throughout the entire design flow, with RTL or design netlists; Conquest, for verifying electronic designs using Property Specification Language (PSL) assertions, SystemVerilog Assertions (SVA), or Open Verification Library (OVL) checkers, using static formal verification; Ascent for automatic checking of Register Transfer Level (RTL) designs to verify logic and find bugs even before simulation; and Clock Intent Verification for verifying the functionality of cross domain clocking schemes.

About Real Intent
Real Intent extends breakthrough formal technology to critical problems encountered by design and verification teams worldwide. Real Intent's products dramatically improve the functional verification efficiency of leading edge application-specific integrated circuit (ASIC), system-on-chip (SOC), and Field Programmable Gate Array (FPGA) devices. Over 40 major electronics design houses, including Sun Microsystems, AMD, Marvell Technology Group, NVIDIA and NEC Electronics, use Real Intent software. For more information, visit
www.realintent.com or e-mail info@realintent.com .


EnVision, Conquest, Ascent, PureTime, and Clock Intent Verification are trademarks of Real Intent, Inc. All other trademarks or registered trademarks are property of their respective owners.